MOSFET devices are well known in the semiconductor art and there is an increasing desire to use MOSFET devices in RF applications because of their many favorable properties. However, a number of problems inhibit their widespread use in RF applications which require both high or very high frequencies and significant power output. For example, it is desirable in the RF art to use MOSFET devices in the grounded-source configuration, as illustrated for example in the equivalent device circuit of FIG. 1. In FIG. 1, MOSFET 10 has source connection 12 with parasitic impedance 13, drain connection 14 with parasitic impedance 15 and gate connection 16 with parasitic impedance 17. These parasitic impedances have a profound affect on the performance of the RF device in an amplifier or other circuit.
The geometric arrangement of the source, drain and gate connections on the semiconductor die affects the utility of the MOSFET for RF applications. For example, FIG. 2 shows prior art RF MOSFET die 19 installed in RF device package 20. MOSFET die 19 is typically mounted on metal layer 21 on dielectric spacer 22 on metallic heatsink flange 24 which is also the RF ground reference terminal. Wire bonds 26 connect the source bonding pad on the upper surface of MOSFET die 19 to grounded package flange 24 and bridge 28. Wire bonds 26 contribute to parasitic impedance 13. Bridge 28 is attached to or part of flange 24 and helps limit parasitic inductance 13. Wire bond 30 connects the gate bonding pad of die 19 to gate input lead 32 and wire bond 34 connects metal layer 21, which typically contacts the substrate drain connection of MOSFET die 19, to drain output lead 36. Wire bonds 30, 34 contribute to parasitic impedances 17, 15 respectively.
The geometries of various types of Prior art MOSFET die 40 are illustrated in FIGS. 3-6. FIG. 3 shows a lateral DMOS device comprising source 42 with source contact 43, drain 44 with drain contact 45, body 46 with more heavily doped region 47, and gate 48 on gate dielectric 49 for inducing lateral channel current flow 50 in body 46, 47. The source, drain and gate connections of the device of FIG. 3 are all on the top surface of the die and substrate contact 51 acts as a "back gate". FIG. 4 illustrates a further lateral device similar to that shown in FIG. 3 but with deep substrate contact 62 extending to highly doped substrate region 63 adjacent back-side contact 64.
FIG. 5 shows a prior art TMOS device comprising sources 52 with source contacts 53, drain region 54, 55 with drain contact 56, lateral diffused region 57 in which channels are formed under gate dielectric 59 by gate electrode 60. Channel current 61 flows first laterally through region 57 into drain region 54 and then vertically downward through the remainder of region 54 into back-side drain contact 55, 56.
FIG. 6 illustrates a prior art vertical MOSFET device configuration comprising source regions 72 with source electrodes 73 shorted to body region 74 overlying lightly doped drain region 76 and highly doped back-side drain contact region 77 and drain contact metallization 78. Gate 79 on gate dielectric 80 induces channel current 82 which flows substantially vertically downward from upper surface source regions 72 through body portion 74 into drain and drain contacts 76, 77, 78. FIGS. 5 and 6 show the typical prior art geometry of MOSFET die 40 most used for high power, high frequency RF applications and illustrated as die 19 in RF device package 20.
Wire bonds 26, 30, 34 of FIG. 2 significantly increase parasitic impedances 13, 15, 17 represented in the equivalent device circuit of FIG. 1. Parasitic impedance 13 appearing in the grounded source lead is particularly troublesome since it is degenerative and substantially degrades overall performance of packaged device 20. A common failing of prior art die designs, illustrated for example in FIGS. 3-6, is that the back-side contact to the semiconductor substrate is either a back-gate contact or the drain contact. In none of these device geometries is the source available as the back-side contact. Thus, in order to mount the MOSFET die in a grounded source package, insulator 22 and wire bonds 26 must be provided. These increase the parasitic electrical and thermal impedance and undesirably degrade the performance of the packaged device.
There is a continuing need for improved MOSFET device geometries which avoid or circumvent these and other limitations of the prior art. This need becomes more important as packaged devices capable of operating at higher and higher frequencies and/or higher and higher power levels are desired, for example, in the range of about .gtoreq.30 MHz and .gtoreq.100 watts, .gtoreq.100 MHz and .gtoreq.10 watts, .gtoreq.500 MHz and .gtoreq.1 watt, and .gtoreq.1000 MHz and .gtoreq.0.1 watt.